Magnetoresistive Random Access Memory (MRAM), based on the integration of silicon CMOS with MTJ technology, is a major emerging technology that is highly competitive with existing semiconductor memories such as SRAM, DRAM, and Flash. Similarly, spin-transfer (spin torque) magnetization switching described by C. Slonczewski in “Current driven excitation of magnetic multilayers”, J. Magn. Magn. Mater. V 159, L1-L7 (1996), has recently stimulated considerable interest due to its potential application for spintronic devices such as STT-RAM on a gigabit scale.
As shown in FIG. 1, one example of a memory cell in a STT-RAM 1 includes a gate 5 formed above a p-type semiconductor substrate 2, a source 3, drain 4, word line (WL) 7 above the gate, and a source line 9. There is also a bottom electrode (BE) 10 formed above the source line 9 and word line 7, and a MTJ cell 11 between the BE and bit line (BL) 12. There is a Cu stud 6 connecting the source 3 to BL 12, and a via 13 and Cu stud 8 to connect BE 10 to drain 4. Thus, the transistor source 3 and drain 4 are connected to the MTJ 11 so that DC current may flow across the MTJ.
Both field-MRAM and STT-RAM have a MTJ element based on a tunneling magneto-resistance (TMR) effect wherein a stack of layers has a configuration in which two ferromagnetic layers are separated by a thin non-magnetic dielectric layer. The MTJ element is typically formed between a bottom electrode such as a first conductive line and a top electrode which is a second conductive line at locations where the top electrode crosses over the bottom electrode.
As the size of MRAM cells decreases, the use of external magnetic fields generated by current carrying lines to switch the magnetic moment direction becomes problematic. One of the keys to manufacturability of ultra-high density MRAMs is to provide a robust magnetic switching margin by eliminating the half-select disturb issue. For this reason, a new type of device called a spin transfer (spin torque) device was developed. Compared with conventional MRAM, spin-transfer torque or STT-RAM has an advantage in avoiding the half select problem and writing disturbance between adjacent cells. The spin-transfer effect arises from the spin dependent electron transport properties of ferromagnetic-spacer-ferromagnetic multilayers. When a spin-polarized current transverses a magnetic multilayer in a CPP configuration, the spin angular moment of electrons incident on a ferromagnetic layer interacts with magnetic moments of the ferromagnetic layer near the interface between the ferromagnetic and non-magnetic spacer. Through this interaction, the electrons transfer a portion of their angular momentum to the ferromagnetic layer. As a result, spin-polarized current can switch the magnetization direction of the ferromagnetic layer if the current density is sufficiently high, and if the dimensions of the multilayer are small. The difference between a STT-RAM and a conventional MRAM is only in the write operation mechanism. The read mechanism is the same.
For STT-RAM to be viable in the 90 nm technology node and beyond, the ultra-small MTJs (also referred to as nanopillars or nanomagnets herein) must exhibit a TMR ratio that is much higher than in a conventional MRAM-MTJ which uses AlOx as the tunnel barrier and a NiFe free layer. Furthermore, the critical current density (Jc) must be lower than about 106 A/cm2 to be driven by a CMOS transistor that can typically deliver 100 μA per 100 nm gate width. A critical current for spin transfer switching (Ic), which is defined as [(Ic++Ic−)/2], for the present 180 nm node sub-micron MTJ having a top-down oval shaped area of about 0.2×0.4 micron, is generally a few milliamperes. The critical current density (Jc), for example (Ic/A), is on the order of several 107 A/cm2. This high current density, which is required to induce the spin-transfer effect, could destroy a thin tunnel barrier made of AlOx, MgO, or the like. Thus, for high density devices such as STT-RAM on a gigabit scale, it is desirable to decrease Ic (and its Jc) by approximately an order of magnitude so as to avoid an electrical breakdown of the MTJ device and to be compatible with the underlying CMOS transistor that is used to provide switching current and to select a memory cell.
Under a macrospin model, the critical switching current density Jc at zero temperature is expected to have the form:Jc˜2eαMst(Ha+Hk+Hdip−4πMs)/η=2eαMst(Heff)/η  (1)where e is the electron charge, α is a Gilbert damping constant, Ms and t are the magnetization and thickness of the free layer,  is the reduced Plank's constant, η is the spin-transfer efficiency which is related to the spin polarization (P), Ha is the external applied field along the easy axis, Hk is the effective anisotropy field including magnetocrystalline anisotropy and shape anisotropy (in an in-plane magnetized bit, Hk is dominated by shape anisotropy), Hdip is the dipolar field from the reference layer, and 4π Ms arises from the demagnetization field of the thin film geometry. In a MTJ structure (F/I/F) where F is a ferromagnetic layer and I is an insulator layer, when the spin relaxation distance is much larger than the ferromagnetic film thickness, the spin continuity holds true, i.e., the sum of interfacial torques from both left and right sides equals the net inflow of spin current. As the magnetization is fixed on one side, the other side magnetization will experience an in-plane torque of T=−(PLJ0/2e)sin(θ) where e is the electron charge, PL is tunneling polarization parameter, J0 is electric current density, and θ is the angle between the magnetizations on the two sides of the tunnel barrier (insulator). Thus, spin transfer efficiency is a function of current polarity, polarization P, and the relative angle θ between the free and pinned layer as represented in the following equation:η(θ)=P/[2(1+P2 cos θ)]
At a finite temperature, thermal agitation plays an important role in reducing the switching current at long current pulses (>10 ns) according to M. Yoshikawa et al. in “Estimation of spin transfer torque effect and thermal activation effect on magnetization reversal in CoFeB/MgO/CoFeB magnetoresistive tunneling junctions”, J. Appl. Phys. 101, 09A511 (2007). In this thermal activated switching regime, the switching current is dependent on the current pulse width τ and thermal stability factor Δ=Eb/kRT, where Eb=MsVHk/2 which is independent of the demagnetization field 4πMs. For an in-plane magnetized bit, demagnetization field 4πMs (several thousand Oersted) is much greater than Ha and shape anisotropy Hk, and dipole field Hdip (hundred Oersted). Therefore, the value of Heff=4πMs restricts efforts to reduce Jc. For an out-of-plane bit, the easy axis is perpendicular to the film plane thereof and Heff=Hk⊥−4πMs.
Magnetization switching behavior at positive and negative biases in STT switching is related to the following: (a) the STT effect; (b) the thermal activation effect due to the Joule heating; and (c) the magnetic excitation effect due to the hot electron. Dynamic behavior of a STT-MTJ depends highly on thermal fluctuation within the device which means a temperature increase within the free layer will play an important role in assisting the switching process.
Within the assumption of equation (1), low critical currents while maintaining thermal stability can be achieved by a perpendicularly magnetized nanomagnet as described by S. Magnin et al. in “Reducing the critical current for spin-transfer switching of perpendicularly magnetized nanomagnet”, APL 94, 012502 (2009). Furthermore, spin transfer torque memory has been investigated for in-plane and perpendicular technologies by micromagnetic simulation by D. Apalka et al in “Comparison of scaling of in-plane and perpendicular spin transfer switching technologies by micromagnetic simulation”, IEEE Trans. Magn. 46, 2240 (2010). There is data to show that in-plane technology has excellent scalability down to the 20 nm width of the cell whereas perpendicular technology has a switching current which is substantially independent of pulse width τ, and a switching voltage that increases rapidly at smaller nodes, thereby requiring significant efforts to design new high polarization and low damping materials.
For STT-RAM applications, the ultra small MTJ element hereafter referred to as a nanomagnet must exhibit a high tunneling magnetoresistive ratio (TMR or dR/R) at low resistance×area (RA) values of less than 20 ohm-μm2. Note that dR is the maximum change in resistance in a MTJ and R is the minimum resistance of the MTJ. D. Dyayaprawira et al. have recently demonstrated in “230% room temperature magnetoresistance in CoFeB/MgO/CoFeB MTJ”, Appl. Phys. Lett. 86, 092502 (2005), that a highly oriented CoFeB/MgO/CoFeB MTJ is capable of delivering dR/R of 230% but with a RA=420 ohm-μm2.
U.S. Patent Application 2010/0065935 describes a free layer with a Co40Fe40B20/NCC/Co40Fe40B20 configuration wherein the NCC layer has a FeSiO2 composition made by sputter depositing a Fe(25 atomic %)-SiO2 target. U.S. Patent Application 2009/0218645 also discloses a MTJ with a CoFeB free layer having a nano-current channel (NCC) layer therein.
U.S. Pat. No. 7,732,881 discloses a CoFe/NCC/CoFe free layer configuration in which the NCC layer may be comprised of Fe—SiO2 or FeCo—SiO2.
U.S. Pat. No. 7,742,328 describes a free layer having at least two ferromagnetic layers separated by non-magnetic spacer layers wherein each spacer layer may be a nano-oxide layer conductive to ballistic magnetoresistive.
To our knowledge, none of the prior art references provide a MTJ that has a thermal stability factor of at least 55 and a Hc of at least 160 Oe to satisfy 64 Mbit STT-RAM requirements. Thus, it is essential to develop a MTJ where all of a high TMR ratio, low RA, thermal stability factor≧55, Hc≧160 Oe, and a current driven switching capability required for high performance STT-RAM are achievable.